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FuturePlus Systems

Testing Services

FuturePlus Systems, LLC, a leading Double Data Rate (DDR) memory debug and validation tool vendor, and Granite River Labs (GRL), a global leader in engineering services and test automation solutions for digital connectivity, have announced a joint effort to expand the availability of DDR memory test services. The collaboration leverages the expertise of both companies in providing world-class test and measurement services to companies using DDR and Low-Power Double Data Rate (LPDDR) memory in a wide range of products, from servers to embedded computer systems.

Below summarizes each of the testing services we offer:

Memory Channel Validation Test

FuturePlus Systems’ Memory Channel Validation Testing Services can be used to find problems in manufacturing, help diagnose failed systems that come back from the field, or just as a general audit to ensure quality.

Memory Channel Validation Audit:

This audit will ensure that the memory channel can be operated at the speeds it was designed for. As an added benefit this procedure can also be used to:

  • Spot check motherboards from manufacturing to ensure quality.
  • Isolate failing memory channels in the field on servers displaying above average memory errors.
  • Check for BIOS bugs that program the Memory Controller incorrectly thus causing JEDEC specification violations.

This testing consists of several parts: an electrical audit, a Protocol and Timing JEDEC specification audit, a Performance Timing Analysis, a SPD/Mode Register Test, and a Row Hammer test.

Embedded Memory Testing

FuturePlus Systems’ ‘Memory Down’ audit will ensure that a DRAM part can be operated at the speeds it was designed for and within the JEDEC specification. Critical applications such as Medical Devices, Defense and Aerospace, or Financial applications need to ensure correct operation of the DRAM Memory as corruption can have disastrous results.

FuturePlus Systems has helped several customers find various problems resulting from:

  • The BIOS programming the DRAM incorrectly
  • Variations in Manufacturing that then resulted in Memory Failures in the field.
  • Software that programs the Memory Controller incorrectly thus causing JEDEC specification violations.

An Embedded Memory Audit consists of:

  • Electrical Audit
  • Protocol & Timing JEDEC specification audit
  • Performance Timing Analysis
  • Mode Register Test
  • Row Hammer Test

DIMM/SODIMM Validation Testing

FuturePlus Systems’ DIMM and SODIMM Testing Services can be used to find problems in manufacturing, help diagnose failed DIMMs/SODIMMs that come back from the field or just as a general audit to ensure quality.

DDR3 and DDR4 DIMM and SODIMM Audit: This testing is referred to as an Audit. It ensures that the design validation was done correctly and a quality product is the result. It is also:

  • An independent check to ensure operational integrity
  • A manufacturing spot check to ensure quality
  • A test for failing DIMMs/SODIMMs returned from the field to isolate root cause of the failure

This testing consists of four parts: Mechanical Audit, Electrical Audit, Data Sheet and SPD Audit ,and an extensive Row Hammer test.

Memory Analysis for High Performance Applications

The old saying “time is money” could not be a more true statement when it comes to high speed DDR Memory accesses. If you have critical applications this analysis will give you insight into where you can make changes and if one system is better than another for your particular workload.

Only available at FuturePlus Systems, this unique analysis is done in system, right at the hardware level. A complete report with the following metrics are part of the service offered:

  • Margin Testing Identifies Key Latency Parameters
  • Command Bus Utilization Analysis
  • Bus Modes Analysis
  • Power Management Analysis
  • Data Bus Utilization Analysis
  • Page Hit Analysis
  • Multiple Open Banks Analysis
  • Bank Group Analysis
  • Bank Utilization Analysis
  • Summary Modes that show performance over long periods of time

Unique to FuturePlus Systems, our memory audit can also increase performance by looking for error situations which can cause system crashes or retries at the higher software level.

Granite River Labs, Inc

About Granite River Labs, Inc

Founded in Silicon Valley in 2010, Granite River Labs (GRL) is the world’s leading Engineering Services and Test Automation Solutions firm for connectivity and charging. GRL helps engineers solve tough design and validation challenges. GRL was founded with a vision to provide affordable test services to help hardware developers implement digital interface technologies as they become faster, more complex, and more challenging to test. Today, GRL has worked with hundreds of companies supporting the adoption of new and emerging technologies from their worldwide test facilities and R&D centers. GRL’s combination of market-leading technical expertise, broad capabilities across connectivity and charging technologies, and intense focus on quality and customer service excellence has led to rapid growth and recognition as the “go to” expert.

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