Embedded Memory Testing

Embedded Memory Testing FuturePlus Systems will use its extensive cache of test equipment, experience and know how to perform an Embedded Memory Audit or Debug. Embedded Memory Audit:  Embedded Memory, or sometimes referred to as ‘Memory Down’, is soldered to the PCB versus being on a DIMM or SODIMM module.  This audit will ensure that the DRAM part can be operated at the speeds it was designed for and within the JEDEC specification.   Critical applications such as Medical Devices, Defense and Aerospace or Financial applications need to ensure correct operation of the DRAM Memory as corruption can have disastrous results. FuturePlus Systems has helped several customers find various problems resulting from: The BIOS programming the DRAM incorrectly Variations in Manufacturing that then resulted in Memory Failures in the field. Software that programs the Memory Controller incorrectly thus causing JEDEC specification violations. Procedure: This testing will be broken into several parts. The first is the electrical audit, the second is the protocol and timing JEDEC specification audit, third is Performance Timing Analysis, the fourth is Mode Register Test and lastly is Row Hammer testing. In order to perform the testing the DRAM parts will be ‘interposed’ using Keysight BGA Interposers. Electrical Audit: This testing ensures that the signals at the DRAM part are acceptable with regards to signal swing, alignment, data valid eye size and that none of the strobe signals, data signals, address, command or control signals look appreciably degraded with respect to their form or function. It will be a qualitative measurement. Eye size will be measured using the Keysight Logic Analyzer at the DRAM part via the...
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