LPDDR4 Detective

  LPDDR4 Detective FEATURES SET-UP TRIGGER & STORE QUALIFICATION PROTOCOL COMPLIANCE PERFORMANCE ANALYSIS TARGET PROBING ORDERING INFO LPDDR4 DETECTIVE FEATURES Provides logic analyzer like deep transaction Listing and Waveform capture Can store up to 1G of captured States at up to 3200MT/s Continuous, real time analysis, not post-processing 2D (voltage & time) Eye Detector guarantees valid data acquisition on each signal Extensive Triggering and Storage Qualification allows precise insight Protocol Violation Detector provides hundreds of simultaneous, real time tests to JEDEC specifications Mode Register Listing provided Supports Auto-Clock rate detect and clock stoppage Connects to the target under test with Flying Lead, BGA interposers or a midbus probe Integrated Microsoft Charts gives quick insight into large trace captures Trigger In & Out allows the Detective to integrate with other test tools LPDDR4 Detective FIltered State Listing LPDDR4 Detective Filtered Waveform TimeLine Post Process Filter Find Tool LPDDR4 Detective Set-up Easy Setup Guide steps the user through the process DDR Detective automated setup calibrates to your target and bus speed in 90 seconds. This allows for use in marginal systems Several CK operating points are supported automatically Final MRS values are automatically loaded into protocol analysis tools. LPDDR5 Setup LPDDR4 Detective Eye Detector LPDDR4 Detective MRS Listing LPDDR4 Detective Triggering and Store Qualification Triggering Features Full control of Trigger Position from 5% – 95% Post store. Adjustable trace depth from 5K to 512M States No need to define 4 states for a Command trigger, the Detective has them pre-defined. External Trigger In and Out Bit specific trigger set up ability across all A/C/C Commands and bus signals or LPDDR4 protocol...

DDR3 Detective

  DDR3 Detective FEATURES SET-UP TRIGGER & STORE QUALIFICATION PROTOCOL COMPLIANCE ROW HAMMER PERFORMANCE ANALYSIS TARGET PROBING ORDERING INFO DDR3 DETECTIVE FEATURES Provides logic analyzer like deep transaction Listing and Waveform capture Can store up to 1G of captured States Continuous, real time analysis, not post-processing Eye Detector guarantees valid data acquisition Extensive Triggering and Storage Qualification allows precise insight Protocol Violation Detector provides hundreds of simultaneous, real time tests to JEDEC specifications Row Hammer Analysis for potential data corruption Interactions among up to 8 ranks, over two slots are analyzed. Mode Register Listing provided Supports Auto-Clock rate detect and clock stoppage Connects to the target under test with DIMM, SO-DIMM, and BGA interposers or a midbus probe Integrated Microsoft Charts gives quick insight into large trace captures Trigger In & Out allows the Detective to integrate with other test tools DDR3 Detective State Listing DDR3 Detective Waveform DDR3 Detective Set-up Easy Setup Guide steps the user through the process DDR Detective automated setup calibrates to your target and bus speed in 90 seconds. This allows for use in marginal systems Final MRS values are automatically loaded into protocol analysis tools. DDR3 Detective Configuration DDR3 Detective Eye Detector results DDR3 Detective MRS Listing DDR3 Detective Triggering and Store Qualification Triggering Features Full control of Trigger Position from 5% - 95% Post store. Adjustable trace depth from 5K to 512M States (1G w/o time stamps) External Trigger In and Out Bit specific trigger set up ability across all A/C/C bus signals and all DDR4 protocol violations Store Qualification Benefits Use any transaction with address as a store qualifier Store only...

DDR4 Detective

  DDR4 Detective FEATURES SET-UP TRIGGER & STORE QUALIFICATION PROTOCOL COMPLIANCE MARGIN ANALYSIS PERFORMANCE ANALYSIS TARGET PROBING ORDERING INFO DDR4 DETECTIVE FEATURES NOW supports 3DS at 3200MT/s! Provides logic analyzer like deep transaction Listing and Waveform capture Continuous Capture for Violations and Performance metrics NOT a fill memory and then post process like other tools.  This is a FuturePlus ONLY feature! Eye Detector guarantees valid data acquisition Extensive Triggering and Storage Qualification allows precise insight Protocol Violation Detector provides hundreds of simultaneous, real time tests to JEDEC specifications Margin analysis shows where command timing fails and where it can be improved Thousands of counters for DDR4 analyze performance metrics real time, all the time, for all commands, total Clocks, by Rank also power management information Interactions among up to 8 ranks, over two slots are analyzed. Mode register and SPD capture are provided Supports Auto-Clock rate detect and clock stoppage Connects to the target under test with DIMM, SO-DIMM, and BGA interposers or a midbus probe Integrated Microsoft Charts gives quick insight into large trace captures Trigger In & Out allows the Detective to integrate with other test tools DDR4 Detective Filtered State Listing DDR4 Detective Filtered Waveform Margin_testing Find Tool RCD Decode Post Process Filter TimeLine DDR4 Detective Set-up Easy Setup Guide steps the user through the process DDR Detective automated setup calibrates to your target and bus speed in 90 seconds. This allows for use in marginal systems Final MRS values are automatically loaded into protocol analysis tools. SPD information from the memory module is provided to the user DDR4 Configuration Set Up DDR4 Detective Eye Detector...

DDR4 DIMM and SO-DIMM Mixed Signal Interposers for Keysight V Series Mixed Signal Oscilloscopes (MSO)

DDR4 MSO Probes The DDR4 DIIM and SO-DIMM Mixed Signal Interposers connect Address, Command and Control signals of a DDR4 bus to the Keysight V-Series Oscilloscopes with the MSO option. These interposers also provide accessibility to DDR4 signals for convenient analog probing. The user can then easily observe both the digital and analog representation of the DDR4 Address, Command and Control bus. Solder down N5541A analog probes purchased separately from Keysight Technologies. FS2588 is for DDR4 DIMM (288 pin) bus, FS2590 is for DDR4 SO-DIMM (260 pin) bus. Quick and easy interposer connection between the DDR4 DIMM or SO-DIMM memory module connector and the Keysight V Series MSOs. Access points for analog probing. See example. All signals are probed passively. Registered and Unbuffered DIMMs and SO-DIMMs are supported. Interposer has minimal signal impact at the probing...

DDR3 DIMM and SO-DIMM Mixed Signal Interposers for Keysight V Series Mixed Signal Oscilloscopes (MSO)

DDR3 MSO Probes The DDR3 DIMM and SO-DIMM Mixed Signal Interposers connect Address, Command and Control signals of a DDR3 bus to the Keysight V-Series Oscilloscopes with the MSO option. These interposers also provide accessibility to DDR3signals for convenient analog probing. The user can then easily observe both the digital and analog representation of the DDR3 Address, Command and Control bus. Solder down N5381B analog probes purchased separately from Keysight Technologies. FS2388 is for DDR3 DIMM bus, FS2389 is for DDR3 SO-DIMM bus. Quick and easy interposer connection between the DDR4 DIMM or SO-DIMM memory module connector and the Keysight V Series MSOs. Access points for analog probing. All signals are probed passively. Registered and Unbuffered DIMMs and SO-DIMMs are supported. Interposer has minimal signal impact at the probing point....
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