Who is to blame for DDR Memory ECC errors?

Is it the DIMM or the System? For DDR4 DIMMs and SODIMMs (that support ECC) the ECC (Error Correcting Code) is calculated by the Memory Controller for each byte on a write. A single bit per byte is provided as part of the calculation and is stored in a different device than the byte its protecting is stored in. However, there is no checking of the write data once it reaches the DRAM. The ECC is really only used to protect the data on the Read. Once the data is read back, the Memory Controller checks the ECC and if incorrect tries to do some kind of recovery. That recovery is system dependent and not specified by the JEDEC spec. In fact, the ECC calculations and algorithms are also not specified and many system vendors do not release their ECC algorithms. If it is a single bit error it will do the correction and write back the corrected data to the DRAM. Single bit errors are also called ‘Soft Errors’. If it detects a double bit error it cannot do any correction as the ECC algorithm is mathematically limited and can only do Single Error Detection and Correction but only Double bit error Detection. You may have seen the acronym SECDED and this is where it comes from, Single Error Correction, Double Error Detection. Double bit errors are sometimes referred to as ‘Hard Errors’ and they will usually cause a machine check and a system crash. System log files should show all of the soft errors and the address that the error occurred on. In addition, it should indicate...

What do you mean there is NO Validation Report?

In our Services department we see all sorts of systems, network switches, routers, and medical devices, etc.  They all share a common theme….the DDR Memory does not work right. The engineers sending us these problem systems are frustrated and we often hear ‘we started getting failures in the field after having it work for years’ or ‘the applications now can’t tolerate any failures’. We even get the occasional ‘this memory stick fails but this one does not, can you tell us why?’. As we go through our Memory Channel Audit we often ask the customers ‘Where is the Validation report for this system?’ The customers almost always say ‘we have no idea!’. Call me old fashioned but I recall working for a large enterprise vendor (DEC) where you had to thoroughly test and validate a system and produce a report that proved, at the very least, you tested it and looked at the Signal Integrity. Given that our society is addicted to the internet, high speed communications, phones, laptops, air travel and on line everything, you would think that validating the platforms and systems that run all of these applications and make all of these critical calculations would at least have some kind of Validation Report. But they don’t and their customers are buying literally millions of them and the general public has become overly reliant on them. The engineers who deploy these systems and are responsible for them in the field should not buy them unless the suppliers PROVE they are good. Given that we are so addicted to the online world we have created we should pressure...

Row Hammer. The problem no DRAM vendor wants to talk about, except for one, Zentel

Zentel’s new DDR3 DRAM has published data showing zero Row Hammer failures.  I fondly recall talking to a large vendor’s ‘tiger team’ concerning Row Hammer failures a few years back.  I asked them what should their DDR3 users do if they start to experience Row Hammer failures.  Their response? ‘Upgrade to DDR4!’.  ‘How convenient’ I responded, ‘forcing the industry to throw away all those DDR3 based systems so you can sell more DDR4’.  And come to find out, DDR4 although a bit better, still experienced Row Hammer failures! We here at FuturePlus Systems are glad to see our colleagues in academia are still hunting down those Row Hammer vulnerabilities (https://rambleed.com/).  They can feel good about causing the industry to look for solutions, and it appears that Zentel has answered the call. To the best of our knowledge Zentel has the ONLY Row Hammer hardened DDR3 memory on the market.  See the Zentel data sheets here.  #rowhammer, #DDR3, #JEDEC, #AP Memory,...
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