Who won the Logic Analyzer Wars?

We learned recently that Tektronix has discontinued the last of its logic analyzer family. Sigh….Here at FuturePlus Systems we walked the careful balance between the two Whales, Tektronix and HP/Agilent/Keysight. Mostly siding with the later and only crossing over to the ‘dark side’ at the customer’s request. I remember vividly visiting the impressive Beaverton Tektronix campus, hat in hand touting our superior interposers and hardware skills looking for the elusive key to the Tektronix software development environment so we could sell into that market. Once we started down the Tektronix path we had to carefully dodge the wrath of our best friend Agilent. Like the old Girl Scout song I sang as a child “make new friends but keep the old….one is silver and the other gold”. Tektronix was Silver but Agilent was clearly Gold. The wars started in the early 2000’s with one large vendor in particular pitting the two giants against each other. It was brutal with every little technical spec thrown back in our faces as the One Large Vendor led us into the ring to chew each other to death. As it turns out the One Large Vendor had made a costly mistake…..they never thought that if they pushed too hard one vendor would walk. As it turned out one of them did and the remaining Whale charged big and delivered what ever they wanted. The One Large Vendor was able to entice the other Whale back into service a few years later and the wars heated up again around 2010. Then the Logic Analyzer business began a slow and steady decline. The reasons were...

LPDDR5 vs LPDDR4: What’s the difference?

Recently JEDEC announced the new JESD209-5 Low Power Double Data Rate 5 (LPDDR5) specification.  LPDDR5 is faster and lower power than its predecessors LPDDR4 and LPDDR4x.  Want a copy of the specification?  Click Here Highlighted below are some of the key differences over the previous generation LPDDR4/LPDDR4X: Higher data rate up to 6400MT/s New features for Automotive Applications including: New packaging Optional Link ECC Multi-clocking architecture allows for the Data and the Address/Command/Control to have separate yet synchronous clocks.  This makes capture of the A/C/C much easier and cost effective for development teams. Multi-bank architecture.  LPDDR5 introduces 3 different programmable bank architectures.  The are: BG Mode = 4 banks, 4 bank groups 8B Mode = 8 banks, no bank groups (Like LPDDR4) 16B mode = 16 banks, no bank groups Non Targeted ODT (On Die Termination) for the DQ data signals to support the higher data rate.  This is where the ODT for parts that are not being accessed is driven. The addition of DFE to help deliver an eye at the higher data rates.  Like DDR5 we expect to see this ‘turned on’ at data rates over 4400MT/s. Power Savings features: Dynamic Frequency and Voltage Scaling for the Core and I/O Selectable Differential or Single Ended Clocks and Read Data Strobes Partial Array Self-Refresh and Auto Refresh Two new Commands to help power consumption by reducing data transmission What applications are the target for the new LPDDR5 standard?  The largest is the mobile cell phone and tablet market.  The second largest would be automotive.  The one thing I see missing in the LPDDR5 standard is someway of measuring...
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