Features - FS4415
Serial Rapid IO Protocol Preprocessor For use with Tektronix Logic Analyzers
Low cost Serial Rapid IO protocol analysis
X1 and X4 lane widths supported
Performs lane alignment (lane deskew)
Detects packet types and checks packet delimiters
Provides packet-aware data filtering (Store
Qualification) and logic analyzer triggering
Provides three 24-byte packet header recognizers (on any combination of bits)
Supports upstream and downstream directions
or two unrelated single direction links
User can select lane inversion and lane numbering reversal as needed to probe the board under test
User can set probe into 10 bit mode (external reference clock required) to view 8b/10b encoded data to debug phy level and link initialization problems. Lane deskew, 8b/10b error checking are included. Packet delimiters are visible in the listing.
Probe Manager software executing on a PC controls probe over a USB interface in real time
Preprocessor powered from external supply, not your system
Proprocessor event log records link status: lane number, time and quantity of receiver errors
Transaction Viewer software
included
Optional FS4416 version supports both SRIO
and PCI Express