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Characteristics - FS4415 SRIO Protocol Preprocessor
For use with Tektronix Logic Analyzers

  • Data acquisition in 8b Decoded Data mode at 3.125, 2.5 or 1.25 Gbps
  • 10b mode (requires external reference clock) reference clock multipliers:
    • 20X multiplier useable from 1.2 to 3.125 Gb/s
    • 25X multiplier useable from 1.2 to 2.8 Gb/s
  • Lane modes: X1 lane and X4 lane (able to select - x1 probing on lane 0 or lane 2).
  • Lane deskew (align) in X4 lane mode.
  • Supports debug of physical, transport and logical layers (messaging, I/O and streaming
  • Advanced filtering (store qualification)
    • Packet types, control symbols, and idles
    • Packet recognizers
  • Jitter specification (valid data eye) :
    • 1.25 Gb/s - 232 ps (.29 Unit Interval)
    • 2.5 Gb/s - 140 ps (.35 Unit Interval)
    • 3.125 Gb/s - 128 ps (.40 Unit Interval)
  • Detects, displays, filters in/out, and allows triggering on the following events in 8b Decoded Data Mode:
    • Invalid serial byte (code violation or disparity error detected, but not displayed)
    • Idle Sequence
    • Control Symbols with Stype0 and Stype1
    • Control Symbols within packets
    • Packet Types 0 through 15
  • Packet Spreading of X1 link data to 4-column format
  • FS4416 is available to add PCI Express analysis capability. Switching between the two is accomplished via the Probe Manager software.
  • Power Requirement - +5V DC (external supply included)
  • USB connector for preprocessor control from a PC

 



FS4415 Product Image
FS4415 Serial RapidIO Protocol Preprocessor

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