Specifications - FS4100 Universal Serial Bus (USB) Analysis Probe

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The USB analysis probe provides two functions:

1. Provides an electrical and mechanical interface from the USB to Agilent logic analyzers for passive bus analysis.
   
2. Provides test points to allow USB power and signal fidelity measurements.

State Analysis Mode
The software included with the FS4100 contains complete configuration files and a FuturePlus USB Transaction Inverse Assembler for your Agilent logic analyzer. In State Analysis mode, the analyzer master clock is derived from the USB Protocol. The USB serial data is converted to parallel data in the analysis probe regardless of high or low speed operation. Any USB resets are automatically detected. Since the address and endpoint specified in the token packet are held until the transfer is complete, triggering, store qualification and performance monitoring of specific end points is easy!

The enhanced triggering capabilities of your Agilent logic analyzer allow you to trigger on:

1. any address and end point,
2. any data pattern,
3. any data CRC,
4. any USB error (CRC fail, serial bit stuff error, and missing frames),
5. bad or invalid PID's, or
6. any combination of the above.

Store qualifiers allow the user to store any combination of:

1. any address and end point,
2. any data pattern,
3. any data CRC,
4. any PID type, or
5. any combination of the above.

All USB cycles and transaction identifiers (SOF, OUT, IN, SETUP,DATA0, DATA1, ACK, NAK, STALL, and PRE) are decoded by protocol-sensitive clocking logic and presented as separate bits to the logic analyzer. These packet identifiers will allow the user to:

1. store all USB traffic,
2. store only certain packet types,
3. store only packets to and from a certain function.

The FuturePlus Transaction Inverse Assembler makes analyzing the resulting stored USB traffic easy and accurate. Another good feature: the electrical power for the FS4100 circuitry is drawn from the logic analyzer, not your USB bus!

Timing Analysis Mode
The FS4100 USB Analyzer has a third pod dedicated to timing analysis of the USB serial bit stream. The FS4100 in timing mode provides a unique state by state view of the USB serial interface engine (SIE). This mode allows for:

1. Shadowing the state of the target USB SIE when that SIE state is unavailable
2. Comparing the state of the target USB SIE with that of the FS4100 SIE
3. Making accurate timing measurements of USB events
4. Accurate USB protocol violation decection
5. Accurate USB signaling violation detection

Cross-Domain Analysis
Are you analyzing data in multiple domains? Simply use this analysis probe to monitor the USB, and then use another FuturePlus Systems analysis probe to monitor your other bus. We have preprocessors for the PCI, ISA, VME, VXI, PMC, and SIMM buses. You can create your own custom measurement system, cross-domain trigger between buses, and view data from multiple buses simultaneously in the same display. In a similar fashion, you could connect a analysis probe for your host processor to another logic analyzer card. You could then use Agilent's Software Analyzer (B4620A) to view source code, code execution, and the corresponding USB packet transfers simultaneously.

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