Specifications - FS3012 64-bit PCI-X Mezzanine Card (PMC)
Analysis Probe and Extender Card

The PMC protocol decode software executes in the Agilent logic analyzer. In State Analysis mode, the analyzer master clock is the PMC clock. The bus protocol decode software decodes the key PMC bus signals and presents a readable display that lists the transaction type, address, data and key status conditions such as wait states and retries. The software also supports user-defined symbols that can be easily added to the state listing display. The user can also select post-processing filters which allow the acquired data to display only chosen transactions. To assist with triggering, pre-defined resource terms have been included that can be used to prevent WAIT and IDLE states from being acquired, thus saving trace memory and providing an easier-to-read state display.

To see other screen captures, click here.

PLEASE NOTE: Electrically, the 64-bit PMC bus is extended approximately 6.0 inches in etch length. Depending on the design of the system, users may experience difficulties with this extension of the PMC bus. The passive logic analyzer termination presents a single electrical load on the PMC bus via low capacitance (10 pF), high impedance terminators, and also provides a matched impedance to the logic analyzer. The analysis probe includes six, 40 pin logic analyzer connectors. High speed Schottky clamping diodes connected to the PMC bus signals and physically mounted near the extender connectors prevent the added etch length from causing unwanted reflections back onto the bus.

Mechanical Drawing