Characteristics
FS2354 DDR3 800 - 1600 SO-DIMM Memory Bus Interposer
For use with Agilent Logic Analyzers

Accurate Protocol Analysis
The FS2354 DDR3 1600 SO-DIMM memory bus interposer brings bus signals to your Agilent logic analyzer via controlled impedance cables for an easy protocol analysis connection while maintaining signal fidelity. The included protocol decode software translates the signals into easily understood bus transactions at the full bus speed. Extensive triggering and store qualification features are available through the Agilent logic analyzer. All signals are probed passively before being sent to the logic analyzer. Burst sizes of 4 and 8 are supported.The user can elect to view either write cycles, read cycles, or a combination of write and read cycles.

SO-DIMMs supported
The FS2354 supports a 204-pin, 667 MHz clock (1600 MT/s data rate), 64-bit, Unbuffered Synchronous Double Date Rate (DDR) DRAM Small Outline Dual In-Line Memory Module (DDR SDRAM SO-DIMM).

Note: Electrically, the FS2354 extends the DDR3 bus approximately 1.0 inch in etch length. FuturePlus has carefully simulated and designed the FS2354 to work in your system. Factors that can have a significant effect on the performance of the whole DDR3 system include the type of memory controller, the target layout, the type of SO-DIMM used, and which SO-DIMM socket is being probed. All users are given 30 days to qualify the FS2354 in their system.