Specifications - FS2332 DDR2 667 DIMM Bus Analysis Probe

Accurate Protocol and Timing Analysis
The FS2332 DDR2 667 DIMM memory bus analysis probe brings bus signals to your Agilent logic analyzer via controlled impedance cables for an easy protocol and timing analysis connection while maintaining signal fidelity. The included transactor software translates the signals into easily understood bus transactions at the full bus speed. Extensive triggering and store qualification features are available through the Agilent logic analyzer. All signals are probed passively before being sent to the logic analyzer. These are also available unbuffered. Burst sizes of 2, 4, 8, are supported.

The user can elect to view either write cycles, read cycles, or combination write-and-read cycles.

Supported DIMMs
The FS2332 supports the PC3200 module, a 240-pin, 200 MHz clock (400 MT/s data rate), 64-bit, Unbuffered Synchronous Double Date Rate (DDR) DRAM Dual In-Line Memory Module (DDR SDRAM DIMM). It also supports slower versions that use a 100 MHz (200 MT/s data rate) or a 133 MHz clock (266 MT/s data rate) DDR SDRAM DIMM. Registered and non-registered DIMM's are supported.