Features - FS2102 & FS2103 PCI Bus 66 MHz, 64-bit Active Analysis Probe And Extender Card

General Features

• PCI bus transaction inverse assembly software designed for easy software and hardware debug
• Logic Analyzer Configuration Software gets you up and running fast
• Complete cycle type identification
• 12 cycle and transaction identifiers allow for easy triggering on various PCI conditions
• Demultiplexed address and command
• Front panel switches allow the user to suppress the acquisition of IDLE and WAIT states
• Powered from logic analyzer, not your target
• Full 32-bit address counter that increments the address to the logic analyzer during burst operations
• Built-in compliance violation triggering
• Short card form factor and simple logic analyzer connection allows easy in-system debug
• Agilent's System Performance Analyzer allows key PCI performance metrics to be viewed in chart or histogram mode

Technical Details
The PCI Bus Active Analysis Probe and Extender card provides two functions:

1) Acts as an PCI extender card, extending the PCI card under test to provide access for additional probing.

Please note: The Extender card functionality is obtained through the use of the straddle mount connector located at the top edge of the FS2102 and FS2103. There are no buffers between the PCI local bus and the extender card connector. The etch from the PCI local bus is less than 3.5 inches and is of near equal length. Due to the extension of the etch length, operation is not guaranteed in all systems. The connector on the top of the card is either a 3.3v version (FS2102) or 5.0v version (FS2103). The card edge of the FS2102/2103 is a universal card edge so the FS2102/2103 can operate in either a 3.3v or 5.0v system.

2) Provides an electrical and mechanical interface to Agilent logic analyzers for active PCI bus analysis.

The PCI inverse assembly software executes in the Agilent logic analyzer. In State Analysis mode, the analyzer master clock is derived from the PCI clock and front panel switches and generated by protocol-sensitive logic. The bus disassembler software decodes the key PCI bus signals and presents a readable display that lists the transaction type, address, data and key status conditions such as wait states and retries. The software also supports user-defined symbols that can be easily added to the state listing display. Front panel switches allow the user to not acquire IDLE and WAIT states and to enable and disable parity checking. The PCI cycle, transaction identifiers, and demultiplexing of command and address lines make triggering easy and accurate.

All PCI cycles and transaction identifiers are decoded by protocol-sensitive clocking logic and represented by bits presented to the logic analyzer. The power for this circuitry is taken from the logic analyzer, not the PCI bus.

In the new Agilent systems, a menu preference allows the user to display bus transactions in terms of common PC accesses such as "video memory" or "RTC/CMOS RAM Data Port". Post processing filters also allow the user to suppress or display various types of transactions.

Cross-Domain Analysis
Are you analyzing data from multiple buses? Simply use this analysis probe to monitor the PCI bus, and then use another FuturePlus Systems analysis probe to monitor your other bus. We have analysis probes for the ISA, PMC, USB, VME, VXI, and SIMM buses. You can create your own custom measurement system, cross-domain trigger between buses, and view data from multiple buses simultaneously in the same display.