Features - FS2009 PCI-X™ 2.0 Bus Analysis Probe

The FS2009 analysis probe supports bus analysis of PCI-X 1.0 and PCI-X 2.0 up to and including PCI-X Mode 2 DDR at the maximum data transfer rate of 266 MT/s (133 MHz clock).

PCI (3.0 volt) is supported by the FS2009 with the purchase of an additional protocol decode software package. The FS1103 provides a single user license for the Agilent 16700 series and the FS1110 provides a single user license for the Agilent 16900 series and Off-line analysis.

The FS2009 is the only analysis probe that provides such a wide breadth of support in a single analysis probe.

The PCI-X 2.0 Analysis Probe provides three functions:

1. A reliable, high fidelity electrical and mechanical interface to an Agilent logic analyzer for PCI-X bus analysis.

2. Reconstructs the PCI-X 2.0 and 1.0 transactions from the data acquired by the probe hardware. The reconstruction is performed by software included with the analysis probe that executes in the logic analyzer.

3. Provides passive electrical connection for timing analysis and use of Agilent Technologies Eye Scan and Eye Finder technology.

Mechanical and Electrical Interface
The FS2009 provides a mechanical and electrical interface between a PCI-X bus and an Agilent logic analysis system. The interface provides a reliable, repeatable connections to the system under test. The FS2009 has termination networks that minimize the effects of loading and reflections on the PCI-X bus.

The FS2009 analysis probe automatically detects whether the bus is operating as PCI, PCI-X 1.0, PCI-X 2.0 Mode 1 with parity or ECC, or PCI-X 2.0 Mode 2. The analysis probe can process the data at a variety of bus clock rates, with or without data strobes, and with 1.5 or 3.3 voltage levels. It also supports 32 and 64 bit buses.

Protocol Decode
Once the data has been transferred to the Agilent 16700- or 16900-series logic analysis system, the FS2009 protocol decode software displays key PCI-X bus signals as transaction type, address, data and key status conditions such as wait states and retries.

The software also supports user-defined symbols that can be easily added to the state listing display.

Predefined filter terms are included to assist with triggering. These may be used to prevent WAIT and IDLE states from being acquired, thus saving trace memory and providing an easier-to-read state display.

Color is used to provide quick and easy visual identification of data and attributes.

Connection to PCI-X 1.0 and 2.0 bus
The PCI-X 2.0 Mode 2 DDR specification allows for only a single PCI-X connector because the bus is operating in a point-to-point mode. When probing the PCI-X connector, the presence of the test tool prevents the use of adapter cards or a bus exerciser.

FuturePlus Systems recognizes this as a serious issue and has developed two different test solutions that do not occupy the only PCI-X connector.

The first connection method employs the FS1021 flexible circuit. The FS1021 is designed to be soldered directly onto the through-hole pins of the PCI-X connector. It provides the highest-bandwidth connection with impedance matching and minimum delay skew to minimize electrical intrusion on the PCI-X bus. Because the FS1021 solders directly to the through hole pins, it cannot be used with surface mount PCI-X connectors.

The second connection method is the interposer adapter. An interposer acts similar to an extender card. It plugs into the PCI-X connector but has a straddle mount connector mounted on the top where an adaptor card or exerciser card can be plugged in.


The edge connector on the top of the FS1022 is designed to support both 3.3 and 1.5 volt adapter cards.

Each FS2009 analysis probe includes one FS1022 and one FS1021.

Timing Analysis
The FS2009 analysis probe includes a timing adapter that enables the user to make 4 GHz timing measurements on the PCI-X bus. Agilent's revolutionary eye scan measurements are support with the timing adapter. Eye Scan lets the user make eye diagram measurements on a single channel or across the entire bus in a matter of minutes. Imaging having an oscilloscope with enough channels to look at an entire PCI-X bus.

Cross-Bus Analysis
Most of the time you are not debugging the PCI-X bus in a vacuum. The bus is interacting with a variety of other buses. If there is a problem is it the PCI-X, the SDRAM memory system or maybe the processor front side bus?

The power of the Agilent logic analyzer is in its ability to simultaneously look at multiple buses using the wide variety of FuturePlus bus analysis probes. Cross-bus analysis provides the ability to trigger across different types of buses and to view the time-correlated data in the same display.

Detailed Information of the FS2009
For more information, please refer to the FS2009 datasheet and user's manual, found in the FS2009 Library.