Specifications - DDR2 Embedded Bus Analysis Software

Accurate State and Timing Analysis
The DDR2 Analysis Software and probing connection brings bus signals to your Agilent logic analyzer via controlled impedance cables for an easy 667 MHz protocol and timing analysis connection while maintaining signal fidelity. The protocol decoder translates the signals into easily understood bus transactions at the full bus speed. Extensive triggering and store qualification features are available through the Agilent logic analyzer. Burst size can be set to 2, 4, 8, or can be automatically sensed. This is used to figure out how many clocks to send to the analyzer on read and write bursts. Burst truncation due to read or write chaining is supported.

The user can elect to see either writes only or reads only, or you can choose to see all strobe activity. This selection affects only the buffered 2x clock. The unbuffered 2x clock is always visible.

Several test probing solutions are available
The user designs special test connectors into the target under test that bring the DDR signals directly to a termination adapter which routes the signals to the logic analyzer. Test connectors available are Samtec and Soft Touch (connectorless). The termination adapter you choose will depend on which Agilent logic analyzer module you want to use and which test connector you incorporate.

Application Note Details Connection Options
You may download an application note that discusses these options in detail from the FS1123 and FS1124 Library page