![]() |
||||||||||
|
|
||||||||||
|
|
Frequently Asked Questions - FS2320 DIMM Analysis Probe Here are answers on some of the more common questions we receive regarding our DIMM Analysis probes. Q. Which DIMM's does your FS2320 Analysis Probe Support? A. The FS2320 supports 64/72 bit, 4-clock unbuffered, 168 pin SDRAM DIMM modules. Q. How does the Agilent logic analyzer connect to the FS2320 DIMM Analysis Probe? A. You must use the Agilent High Density Termination Adapter. This adapter connects two of the Agilent 40-pin logic analyzer cables to an AMP Miktor connector on the FS2320. You will need a total of three if you want to be able to look at all signals simultaneously. The High Density Termination Adapter is available from FuturePlus as product number FS1000 or from Agilent as product number E5346A. Q. What software is included with the FS2320 DIMM Analysis Probe? A. Files are included that automatically set up your Agilent logic analyzer for timing analysis mode and label all the signal names. Q. Are you able to acquire the data on every rising edge? A. The FS2320 is a timing probe and is used primarily with the analyzer's timing mode,. However, a user can use the CK signals of the DIMM to clock the analyzer with the analyzer's state mode. The user must change the format of the analyzer to do state mode. Q. Are you able to disassemble (Read, write, burst cycle...) SDRAM cycle? A. We do not provide an Inverse Assembler because that is a state analyzer feature and the FS2320 is a timing probe. However, as mentioned above, a user could decode some of the data captured in state mode using symbols. Q. How do I find out what are the latest versions of Agilent logic analyzer operating software? A. Contact your nearest Agilent Call Center. Q. How do I know which Agilent logic analyzer is best for my needs? A. Click here. Have a question you don't see answered? Contact Technical Support for a prompt answer. |
|
|||||||||||||||||||||||||||||
Copyright 2006 FuturePlus Systems Corporation |
|||||||||||||||||||||||||||||||