16901A 2-slot modular logic analysis system support — The 16901A offers:
15-inch (38.1 cm) color touch screen display.
2 slots for measurement modules.
Smallest modular form factor (11.3"h x 17.5"w x 14.2"d / 28.7 cm h x 44.5 cm w x 36.1 cm d).
Six USB 2.0 ports, 2 on the front and 4 on the back of the instrument.
16950B logic analyzer module support — The 16950B offers:
4 GHz (250 ps) Timing Zoom with 64K memory depth.
667 MHz state clock rate.
Data rates up to 1066 Mb/s.
600 MHz / 1.2 GHz (full / half-channel) timing with deep memory.
600 MHz transitional timing.
Memory depths (upgradeable): 1 M, 4 M, 16 M, 32 M, or 64 M.
68 channels per module (combine modules for higher channel counts).
Supports single-ended and differential signals.
Automated threshold/sample position for accurate measurements on high-speed buses.
Simultaneous eye diagrams on all channels identifies problem signals quickly.
600 MHz / 1.2 GHz (full / half-channel) timing with deep memory.
B4656A FPGA Dynamic Probe for Altera — The B4656A FPGA dynamic probe software gives you easy access to signals internal to Altera FPGAs and provides significant productivity improvements when debugging FPGA designs. The dynamic probe lets you view up to 256 internal probe points for each external pin dedicated to debug. It measures new groups of internal signals in seconds without design changes. It also eliminates error-prone and time-consuming tasks with automated signal/bus name importing from the FPGA design software to the logic analyzer.
Supported Altera FPGA families: Stratix II, Stratix II GX, Stratix GX, Stratix, Cyclone II, Cyclone, MAX II, APEX 20K, APEX II, Excalibur.
Time Correlation to Agilent E2960 Series protocol analyzers for PCI Express — Time-correlate PCI Express bus activity with the activity from other devices in your digital system:
cross-trigger and make time-correlated measurements, using tracking markers, between an external protocol analyzer and a logic analyzer.
default de-skew values are established for the specific logic analyzer and protocol analyzer connection or you can manually enter de-skew values, if desired.
multiple PCI Express protocol analyzers can be time-correlated to a single logic analyzer.
Requires LAN and an N5313A cable to establish the link between the logic analyzer and PCI Express protocol analyzer.
Access this capability from Setup>Add External Protocol Analyzer.
Works with Agilent N5306A protocol analyzer modules for PCI Express Gen 2 and N5305A protocol analyzer modules for PCI Express Gen 1.
Demo Center additions — Learn more about new features and capabilities supported by your logic analyzer.
B4656A FPGA Dynamic Probe for Altera.
"Read-Only" capability for licensed tools in offline mode — Easily share and view data files in offline mode. Some application software (inverse assemblers, packet decoders, etc.) requires a license to enable the software's capability. When you make measurements on a logic analyzer with licenses, configuration files saved in the ALA format can be viewed "read-only" by others in offline mode without having licenses for the tools used in the configuration. Licenses are required to go online or to add any licensed tools, windows, etc.
Modifications
Packet Viewer — The Packet Viewer is removed from the Overview tab when one or more packet decoders connected to it are disabled.
VBAView>Distribution Sample…
The Distribution macro has been updated to work with non-hex based symbols.
Bus/signal names from analysis tools, whether passed through from a module or created new in the tool, can now be used by the Distribution Sample macro.
Symbol reader / Source correlation:
The symbol reader has been updated to work with COFF2 files with section names > 8 characters.
Source correlation allows the user to specify a local path to use when searching for source files. In the instance where multiple files have the same name but different paths, you can find all files with the same name, without having to specify all possible paths, by changing the .ini file to accept a path change command of the form:
#SourceFilePathChange="Orig_path;New_path"
Message Dialogs:
In some instances, the following message is displayed when using the touch screen: "This is an evaluation version of UPDD. Click OK to continue." The evaluation and released versions of the touch screen driver provide equivalent functionality. When the touch screen driver is updated in the next version of the recovery software, this dialog will no longer occur.
The Filter tool will display a warning dialog when bus/signal names requested in the filter definition are not available to the filter tool. This may occur in a configuration file when saving a Filter Favorite from one filter tool that has access to bus/signals names to another filter tool that does not have access to the same bus/signal names.
Loading Configuration Files — Trigger Arming and Flags allocation is delayed until the load of a configuration file is complete.
Split Analyzers — If you choose to disable one analyzer in a split analyzer configuration, both analyzers will be disabled. Any Arming between the split analyzers and other modules in the system will also be disabled.
Multiframe — Multiframe systems running on versions 3.56 or 3.57.0000 should be updated to version 03.57.1000 or higher. Once updated, cycle power on the frames in the multiframe configuration to update the system FPGAs with the latest firmware.
