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Frequently Asked Questions - Agilent 16900-series Logic Analyzers

Software Version 02.50 Release Notes

Additions

    B4655A FPGA dynamic probe support (AddIn): The FPGA dynamic probe software gives you easy access to signals internal to Xilinx FPGAs and provides significant productivity improvements when debugging FPGA designs. The dynamic probe lets you view up to 64 internal probe points for every external pin dedicated to debug. It measures new groups of internal FPGA signals in seconds without design changes. It also eliminates error-prone and time-consuming tasks with automated signal/bus name importing from the FPGA design software to the logic analyzer.

    N4220A/B PCI Express Packet Analysis Probe support (AddIn): Provides the ability to decode PCI Express bus data when used in conjunction with the Packet Decoder tool. Custom packet events from traces captured on a 16700-series frame can be imported as XML files. To do this requires 16700-series application software version A.02.90.

    Probe control column in Overview window: A separate column has been added to the Overview window for probes. The probe column provides access to the control and/or properties dialogs for the selected probe. Probe types available with this release are the FPGA dynamic probe, the general-purpose probe set (Soft touch, Mictor, Samtec, Flying lead), and the N4220A/B PCI Express Packet Analysis Probe.

    General purpose probe set (AddIn): The general purpose probe software lets you set up soft touch, Mictor, Samtec and flying lead probe definitions in order to:

      • Display device under test pin/pad numbers in the Buses/Signals setup tab.
      • Document logic analyzer connections.
      • Define buses/signals automatically when importing netlist files.

     

    Trigger Out "Feedthrough" mode (16900-series): Added Feedthrough mode to Trigger Out. Feedthrough mode is used to control the duration of the Trigger Out signal by setting and clearing a flag connected to Trigger Out.

    Eye finder (1680- and 1690-series): Eye finder automatically adjusts the sampling position for all signals and buses when in state mode. It can correct for the small delay effects caused by probe cables and circuit board traces. This makes the logic analyzer's setup/hold window smaller and lets you accurately capture data at higher clock speeds. This capability, previously available in the 16900-series, is now also available for the standalone 1680-series and the PC-hosted 1690-series logic analyzers.

Modifications
    • Installation package for Motorola MPC8260 support properly completes installation.

    • Increment/decrement arrows in the time field for the "Pattern present for >t time" trigger function provide access to the full time range allowed.

    • Unused pods have been removed from XML configuration files for Agilent PowerPC 405, ARM, and Motorola 683xx configuration files. This allows the configuration files to load in the lowest channel count configuration possible.

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