, it
 
 




DDR Memory FAQs
 
 DDR1 333 DIMM  
 DDR1 333 SODIMM  
 DDR1 400 DIMM  
 DDR1 Embedded  
 DDR2 667 DIMM  
 DDR2 667 SODIMM  
 DDR2 800 DIMM  
 DDR2 Embedded  
 DDR3 1067 DIMM  

 


Frequently Asked Questions - Embedded DDR2 Analysis Software

Q. Which DIMMs does your FS1123 and FS1124 DDR2 Analysis software support?

A. The FS1123 and FS1124 support registered and non-registered DIMMS. Both x4 and x8 SDRAMS are supported.

Q. How does the logic analyzer connect to my DDR2 memory system?

A. There are several ways for you to connect the logic analyzer by designing in a special test connector. You can use a Mictor, a Samtec or an Agilent Softouch. Termination Adapters are used to plug into the test connectors. The other end of the termination adapter connects to the logic analyzer pods. The necessary impedance matching networks are included in the termination adapter. You can see more details in this application note.

Q. Do you have a product that connects directly to a DDR2 DIMM socket?

A. Yes, we have two, the FS2332 and FS2334. Please see the DDR2 Overview for more information.

Q. What software is included with the FS1123 and FS1124 DDR2 Analysis software?

A. Files are included that automatically set up your Agilent logic analyzer for state or timing analysis mode and label all the signal names. Another file is the protocol decoder, which translates the signals into bus transactions during state analysis.

Q. Is this the same software that is included with the FS2332 or FS2334?

A. No. The FS1123 and FS1124 are special versions of the DDR2 software that have user preferences to customize the measurements to the user's particular bus implementation.

Q. Does the FS1124 include the FS1140 performance checker software?

A. No. Since FS1124 has user preferences to customize the measurements to the user's particular bus implementation, performance checks would likely not be valid.

Q. Is there any power drawn from my system?

A. No.

Q. Can the logic analyzer trigger on DDR2 protocol violations?

A. It is possible by using the advanced turbo triggering in the Agilent OS. You can set up different scenarios to trigger on violations. There are triggers in the advanced turbo triggering that will allow you to trigger on too few states between patterns, trigger on 1 certain pattern immediately followed by another specified pattern, etc. Without the advanced turbo trigger we don't think it would be possible.

Q. What do we do with the Differential Strobes? Some of them show on the pin out but aren’t connected to clock pins on the analyzer.

A. Use only the positive signal from the differential pair. The only time we use both pairs is when they are routed to a clock signal. We have had success just using the positive signal from the differential pair.

Q. What clock do we use to sample Reads and Writes? We believe that we should use the command clock, but this raises some questions about this technique. Do the separate groups of data, each of which has its own Strobe, change in phase relationship to the command clock over time? We just need some explanation that convinces us that your acquisition technique is valid.

A. Yes you are correct that the strobes do change in relationship to the clock. We use CommandClk, which is just CK0. This is where the dual sample method comes into play. We have duplicate signals assigned to different probes - the data signals, ECC data and strobes. One set of signals are physically probed, then they are duplicated on the dual sample pod. Then sample positions are set on one set of signals to capture writes. The duplicated signals on the dual sample pod are then set up to capture reads. Setting up the sample positions differently is just making up for difference in the strobe relationship. Dual sample mode allows us to use CK0 to capture both read and write data and not use the strobes at all for data capture. The decoder then will grab data from either the data label for reads if it comes across a read command or it will take the data from the write data label if it decodes a write command. Timing zoom is used to determine the correct sample position for reads and writes. The user manual explains the step by step procedure used to calibrate the configuration file to capture both reads and writes.

Q. How do I find out what are the latest versions of Agilent logic analyzer operating software?

A. Contact your nearest Agilent Call Center.

Q. How do I know which Agilent logic analyzer is best for my needs?

A. Click here.

Have a question you don't see answered? Contact Technical Support for a prompt answer.