Software User Interface

DDR Memory Bus Electrical Validation and Analysis Software - available from Tektronix

  • Auto-configuration Wizard Guides Easy Setup and Test Configuration
  • Analyze All Read/Write Bursts in the Entire Acquisition
  • Plot DQS and DQ Eye Diagrams for Reads and Writes
  • Perform JEDEC Conformance Tests with Pass / Fail Limits
  • Use Chip Select to Qualify Multi-rank Measurements
  • Navigate / Time Stamp Reads and Writes in an Acquired Record using Search and Mark
  • Use Pinpoint Triggering and DPX to Quickly Identify Infrequent Anomalies
  • Easily Move between Conformance-test and Analysis / Debug Tools
  • Automatically Produce Consolidated Reports with Pass / Fail Information, Statistical Measurement Results, and Test-setup Information
  • Use Address/Command Bus to Precisely Qualify Read and Write Bursts or Other Events

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