Frequently Asked Questions

FS3020 CompactPCI Analysis Probe

This page provides answers on some of the more common questions we receive regarding our PCI Analysis probes. A special thanks to all our customers who take the time to call us with suggestions.

Q. Is there a new version of PCI Analysis Probe Software available?

A. FuturePlus Systems is pleased to provide free upgrades of the latest PCI software to all PCI Analysis Probe customers. Go to the Technical Support area to see the latest version numbers; you may request a free update there. The new versions contain a bug fix in the Rev. 2.4 inverse assembler for the decode of dual address cycles and special cycles.

Q. What configuration file do I use for the new Agilent 1670A, 1671A, 1672A logic analyzers?

A. Use the configuration file for the 16555A logic analyzer.

Q. How do I find out what are the latest versions of Agilent logic analyzer operating software?

A. Contact your nearest Agilent Call Center.

Q. How do I know which Agilent logic analyzer is best for my needs?

A. Click here.

Q. How can I use the trigger macros?

A. The HP16550, HP1655x and HP1660 series of logic analyzers all contain trigger macros. To access these trigger macros go the trigger menu and select one of the sequence level numbers (1, 2, 3, etc.), then select "select new macro". A new pop-up menu will appear that lists several generic trigger macros. Select one of these and you can fill in the variables. Once you have selected the variables and returned to the trigger menu you may decide that you would like to change the "hard coded" term of "anystate" to something more appropriate. You can then select "modify trigger" from the trigger menu and then select "break down macros" . Now you will be able to edit the individual sequence levels of the macro and change the variable "anystate". BEWARE! once you collapse the macro you lose this customization of "anystate". Trigger macro's can make triggering much easier..try them!

Q. When switching between timing and state I lose the inverse assembly display. What's happening here?

A. There seems to be a little "feature" in the way the Agilent logic analyzer points to the inverse assembler. It loses the pointer the first time you switch but on all subsequent switches it seems to find it. So when you switch the very first time back to state, select the base marked HEX under "DATA". A pop-up menu will appear on the screen and from there you can select INVASM. All subsequent switches should then act properly and you won't lose the inverse assembler.

Q. Does the FS3020 work with the Agilent 1650B logic analyzer?

A. YES...with the following restrictions. You will need to use the files for the HP16510 for the HP1650B. Please note that the HP1650B must have the latest version of the OS installed on it. And please note that the HP1650B is only 35Mhz state. If you are doing 33Mhz PCI this may seem ok....however the HP1650B requires 10ns of setup and the PCI can have (worst case) only 7 ns of setup. Please keep this in mind when using this configuration.

Q. Does the FuturePlus FS3020 support the new version 2.3 of the PCI specification?

A. Yes, for the most part. Chapter 2 introduces the SMBus signals. Our PCI probes and protocol decode software do not have any provision for supporting this optional feature of PCI. We are considering adding support of the SMBus signals. If this is important to you please contact us and let us know.

Chapter 3 changed from Address/Data stepping to IDSEL stepping. This has no effect on our probes or protocol decode software. The probes will report the state of the 5 control signals on each clock edge. The protocol decode software works on the contents of the 5 control signals in each state. The IDSEL is a way for the bus master to delay asserting the frame signal and beginning a transaction. The protocol decode software will simply report an IDLE state during the delayed portion of the transaction.

The Chapter 6 changes all fall within the configuration space functionality. The protocol decode software only decodes config requests if the offset falls within the device or bridge headers, and then only to their fieldName:hex value pairs. The protocol decode software does not try to identify the value represented by the hex value. Config requests with an offset greater than the header will only be decoded as hex values only. The main reason for this is that config requests often contain pointers to lists/tables of information that the probe software has no access or knowledge of. The protocol decode software can only work with the information contained in the current transaction and is unable to present the information in the list/table.

Chapter 8 adds the SMBus ECN. This is a new section of the specification and our existing products do not support this new feature. If this is important to you please contact us and let us know.

Appendix D,H,and I fall within the configuration space. We decode to the hex values, not to what that hex value represents.

To summarize, there is very little impact on our analysis probes and protocol decode software. We are examining the changes to the specification to determine if there is a customer demand for supporting the optional SMBus. If this is important to you please contact us and let us know.

Have a question you don't see answered? Contact Technical Support for a prompt answer.

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