PCI Analysis Probes

This page provides answers on some of the more common questions we receive regarding our PCI Analysis probes. A special thanks to all our customers who take the time to call us with suggestions .

Q. You seem to have a lot of different PCI analysis probes. How can I tell which is best for my needs?

A. We have many customers with diverse measurement needs. We offer several variations of our products to meet those needs. To help you out we have prepared a decision table that should give you the right product.

Q. When trying to trigger with a FS2000 or FS2001, I am not able to trigger on the first assertion of FRAME# which signifies the start of a transaction. I always seem to trigger on WAIT- TARGET AND INITIATOR NOT READY.

A. Try using the trigger macro's that are available with your HP16550 or HP1660 series logic analyzers. The trigger macro's menu can be accessed from the trigger menu that allows you to change a particular sequence level. At the top center of that screen is a button labeled "Select New Macro". From the Macro menu try the one labeled "Find event2 immediately after event1". Event 2 can be the command/address cycle you are looking for and event 1 can be the "not equal" of that term. Note: the new FS2100 and FS2101 PCI Plus Analysis Probes have much more versatile triggering capabilities.

Q. Is there a new version of PCI Analysis Probe Software available?

A. FuturePlus Systems is pleased to provide free upgrades of the latest PCI software to all PCI Analysis Probe customers. Go to the Technical Support area to see the latest version numbers; you may request a free update there. The new versions contain a bug fix in the Rev. 2.4 inverse assembler for the decode of dual address cycles and special cycles.

Q. What configuration file do I use for the new Agilent 1670A, 1671A, 1672A logic analyzers?

A. Use the configuration file for the 16555A logic analyzer.

Q. How do I find out what are the latest versions of Agilent logic analyzer operating software?

A. Contact your nearest Agilent Call Center.

Q. When upgrading to OS A.02.30.00 and either FS1105 or FS1106 is installed, we lose the icons in the workspace.

A. When you check to see what is installed on the machine, it shows these packages are installed. However in the workspace the icons are gone. To get them back, you must remove the package first. For example, you would have to remove the FS1105 package first, then re-install it. Then the icon would appear and function correctly.

Q. How do I know which Agilent logic analyzer is best for my needs?

A. Click here.

Q. How can I use the trigger macros?

A. The HP16550, HP1655x and HP1660 series of logic analyzers all contain trigger macros. To access these trigger macros go the trigger menu and select one of the sequence level numbers (1, 2, 3, etc.), then select "select new macro". A new pop-up menu will appear that lists several generic trigger macros. Select one of these and you can fill in the variables. Once you have selected the variables and returned to the trigger menu you may decide that you would like to change the "hard coded" term of "anystate" to something more appropriate. You can then select "modify trigger" from the trigger menu and then select "break down macros" . Now you will be able to edit the individual sequence levels of the macro and change the variable "anystate". BEWARE! once you collapse the macro you lose this customization of "anystate". Trigger macro's can make triggering much easier..try them!

Q. When switching between timing and state I seem to lose the inverse assembly display. What's happening here?

A. There seems to be a little "feature" in the way the Agilent logic analyzer points to the inverse assembler. It loses the pointer the first time you switch but on all subsequent switches it seems to find it. So when you switch the very first time back to state, select the base marked HEX under "DATA". A pop-up menu will appear on the screen and from there you can select INVASM. All subsequent switches should then act properly and you won't lose the inverse assembler.

Q. I am using my FS2000 Analysis Probe (rev 3.0 software) and I want to store only configuration transactions targeted for my card. My card is installed in the FS2000 extender card connector.

A. No problem! Refer to page 4 of your PCI Triggering Application note that was shipped with your PCI Analysis Probe. Change the term XACTION to include IDSEL = 1. This will save only configuration transactions targeted to your card. If you have misplaced your triggering app note, you can get another copy in the Technical Support area.

Q. I have just received my new PCI Analysis Probe and I'm comparing the software with the software of my old PCI Analysis Probe that I received a year back. Is the new IA faster? One problem I have is if I choose INVASM and happen to have filtered out too many states that it gets confused, sometimes it takes the IA a long time (up to 2 minutes) before I get touch screen control back. Then, if I turn the knob even one state scroll, it happens again.

A. We have improved the speed...but only by about 15%. This is an area that we have done much research on.. The problem is that the display memory of the logic analyzer and the acquisition memory are not the same size...so when you change the display (scrolling) it goes and runs the IA again on all the states. There is one trick you can try to improve performance. When using invasm options for the first time on a buffer, turn them all to suppress so all the states get tagged. Then select what you want. This means that the IA will check to see if a state has been decoded and if the tag has been set it will skip over some code and make things happen faster. Note: the new FS2100 and FS2101 PCI Plus Analysis Probes do not use INVASM options and thus the performance is much better.

Q. I am using a backup copy of my PCI Analysis Probe software. When triggering using the default store qualifiers IDLE, T_WAIT and DF_WAIT I noticed that all the labels were don't cares!

A. It appears that your software got corrupted or someone cleared these terms and then saved the configuration file with the terms cleared. Also when using the HP16505A these terms will be uploaded to the HP16505A and cleared on the HP16500B mainframe. So if you unlocked the mainframe and went to the trigger screen you would see don't cares in all the columns. If you have lost these terms just reload the software from the your PCI Analysis Probe diskette or code them in by hand. IDLE=IRDY#=1, FRAME#=1, T_WAIT=IRDY#=0, TRDY#=1, STOP#=1, DEVSEL#=0 and DF_WAIT=FRAME#=0, IRDY#=0, STOP#=1, DEVSEL#=1, all other labels are don't care.

Q. I purchased an FS2001 PCI Analysis Probe in the past and have been using it at 33 MHz. Now I am moving to 66 MHz, but the FS2001 will not let my system run any faster than 33 MHz. What is the problem?

A. When the original PCI spec was released, it called for pin 49 (Side B) to be grounded, so we grounded this pin to comply with the spec. In the latest release of the spec, it now calls for this pin to be used for 66 MHz. We have changed our board with Rev. D2 to comply with this new requirement. If you have one of the older versions, simply cut the trace etch going to pin 49 on Side B and your analysis probe will work fine at 66 MHz.

Q. Does the FS2000 work with the Agilent 1650B logic analyzer?

A. YES...with the following restrictions. You will need to use the files for the HP16510 for the HP1650B. Please note that the HP1650B must have the latest version of the OS installed on it. And please note that the HP1650B is only 35Mhz state. If you are doing 33Mhz PCI this may seem ok....however the HP1650B requires 10ns of setup and the PCI can have (worst case) only 7 ns of setup. Please keep this in mind when using this configuration.

Q. I see that FuturePlus Systems has several products where there are different product numbers for 3.3v and 5v. Why is this?

A. You are correct. FuturePlus has three sets of products that have different numbers for the 3.3v and 5v versions: FS2005 and FS2006, FS2100 and FS2101, and FS2102 and FS2103. Each of these products has the same universal keying on the PC board edge connector. Also, the protocol analysis for 3.3v and 5v is the same. However, the difference is in the extender card connector that is mounted on the top of the PC board. This extender card connector is only available as a 3.3v keyed connector OR a 5v keyed connector. Thus if you want to extend a card in both 3.3v and 5v systems you will need both products in a given set. We do not use the voltage on the PCI connector to power our analysis probe since the power we use comes from the logic analyzer.

Q. I am designing a custom physical connection to a PCI bus and am using the 32 bit PCI pin out suggested by FuturePlus on your web site. On Logic Analyzer Pod 4, there are 2 signals: SDONE and SBO#, which I do not see in the PCI signal list.

A. You are correct. In the PCI Specification A40 and A41 are SDONE# and SBO#. We have included them in the pinout. However, these signals are not often used so you may delete them and replace them with other signals from your target. The inverse assembler that comes with our software only product will not look at these signals. The configuration file however does contain these signals. You will easily be able to replace these signal names in the format menu once the configuration file is loaded into the logic analyzer.

Q. Do the FuturePlus PCI analysis probes support the new version 2.3 of the PCI specification?

A. Yes, for the most part. Chapter 2 introduces the SMBus signals. Our PCI probes and protocol decode software do not have any provision for supporting this optional feature of PCI. We are considering adding support of the SMBus signals. If this is important to you please contact us and let us know.

Chapter 3 changed from Address/Data stepping to IDSEL stepping. This has no effect on our probes or protocol decode software. The probes will report the state of the 5 control signals on each clock edge. The protocol decode software works on the contents of the 5 control signals in each state. The IDSEL is a way for the bus master to delay asserting the frame signal and beginning a transaction. The protocol decode software will simply report an IDLE state during the delayed portion of the transaction.

The Chapter 6 changes all fall within the configuration space functionality. The protocol decode software only decodes config requests if the offset falls within the device or bridge headers, and then only to their fieldName:hex value pairs. The protocol decode software does not try to identify the value represented by the hex value. Config requests with an offset greater than the header will only be decoded as hex values only. The main reason for this is that config requests often contain pointers to lists/tables of information that the probe software has no access or knowledge of. The protocol decode software can only work with the information contained in the current transaction and is unable to present the information in the list/table.

Chapter 8 adds the SMBus ECN. This is a new section of the specification and our existing products do not support this new feature. If this is important to you please contact us and let us know.

Appendix D,H,and I fall within the configuration space. We decode to the hex values, not to what that hex value represents.

To summarize, there is very little impact on our analysis probes and protocol decode software. We are examining the changes to the specification to determine if there is a customer demand for supporting the optional SMBus. If this is important to you please contact us and let us know.

Have a question you don't see answered? Contact Technical Support for a prompt answer.

Back to Top